ML HW-SW Co-Design Silicon Tech Lead Manager

<h2><strong>Snapshot</strong></h2> <p>At Google DeepMind, we value a unique culture where long-term ambitious research flourishes. We are seeking a highly motivated ML Silicon Tech Lead Manager to join our HW-SW co-design team. This is a hands-on role for a deeply technical expert who will also lead a high-impact team to drive advances in machine learning acceleration.</p> <h2><strong>About You</strong></h2> <p>GenAI at Google DeepMind prioritizes deeply technical leadership. We are looking for an individual who:</p> <ul> <li><strong>Contributes as a Senior IC:</strong> You are expected to be a direct technical contributor, particularly during onboarding and within key workstreams.</li> <li><strong>Acts as a Technical Anchor:</strong> You excel at aligning senior engineers who may have diverging technical directions. You are the person who reduces the feeling of "too many moving parts" by providing a cohesive architectural north star.</li> <li><strong>Thrives in Ambiguity:</strong> You are flexible enough to change course when ideas don't work out and willing to "plug in" wherever the project needs the most senior technical support.</li> </ul> <h2><strong>The Role</strong></h2> <p>As a TLM, you will spend a significant portion of your time on technical execution while managing a multi-disciplinary team to evolve our ML accelerator designs&nbsp; in close collaboration with a paired ML software team.</p> <p><strong>Key Responsibilities:</strong></p> <ul> <li><strong>Direct Technical Contribution (IC):</strong> Directly contribute to the codebase and technical strategy. IC focus can be one specific silicon engineering discipline, or spanning the program needs more broadly.</li> <li><strong>Technical Team Leadership: </strong>Lead a small team of ML silicon engineers across logic design, physical design, interconnect, and power.</li> <li><strong>Architectural Alignment:</strong> Drive team cohesion by synthesizing fragmented technical opinions into a single, high-quality execution plan.</li> <li><strong>HW-SW Strategy: </strong>Partner closely with the ML software team to define requirements for next-generation ML accelerators.</li> <li><strong>Execution Management:</strong> Oversee technical execution across a virtual team including Google-internal and external partners.</li> </ul> <p>Minimum Qualifications:</p> <ul> <li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.</li> <li>10+ years of experience in silicon architecture, design, validation, or product development.</li> <li>Proven track record of technical leadership and successfully delivering complex silicon projects (tape-outs) to production.</li> <li>Deep expertise in at least one core silicon discipline (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow.</li> <li>Experience with managing cross-functional silicon projects, including schedule, scope, and execution, and also managing silicon vendors and other external partners.</li> </ul> <p>Preferred Qualifications:</p> <ul> <li>Master's or Ph.D. in a related field.</li> <li>Experience leading and managing teams across the full silicon development cycle, from RTL to bringup.</li> <li>Experience with high-performance compute IPs (e.g., GPUs, ML accelerators).</li> <li>Knowledge of high-performance and low-power architectures for ML acceleration.</li> <li>Excellent communication, and leadership skills.</li> </ul>